1. Field of the Invention
The present invention relates to highly integrated electronic circuit devices and, more particularly, to an inspection circuitry for facilitating the operation tests for multiple-terminal semiconductor integrated circuit (IC) devices, each having an increased number of input/output terminal pins aligned at a decreased pitch. The present invention also relates to a technique of facilitating an operation test and/or a mounting state inspection for a semiconductor integrated circuit device for electrically driving a thin-plate type display device such as an active-matrix type liquid crystal display (LCD) unit.
2. Description of the Related Art
With the recent development of solid-state integrated circuit (IC) technology, semiconductor IC devices or large-scale integrated circuits (LSIs) have greatly increased in integration density or packing density of internal elements. As the integration density increases, the external connection terminal pins of a semiconductor IC package increase in number and decrease in layout pitch (pad pitch). The presently available semiconductor IC devices include a highly integrated LSI device which has 300 external terminals or more, and the pad pitch of 80 micrometers or less. Such "multiple-terminal/small-pitch" semiconductor device is widely used in the manufacture of digital equipment, especially for highly advanced electronic circuit sections which drive ASICs, thin plate type displays (such as LCD panels), the printing heads of thermal printers, and the like.
Conventionally, when the highly integrated semiconductor IC devices are subjected to an inspection including operation tests, the test probe pins of a probe card are brought into contact with almost all external terminal pins of each IC to be inspected, including signal input terminals and signal output terminals, thus checking the operation of each internal circuit and discriminating non-defective devices. In this case, the input/output terminals also serve as check terminals. Some ICs may have one or a plurality of check terminals exclusively used for inspection in addition to the input/output terminals. Even in such a case, in order to execute an intended inspection, it is required that the probe pins be brought into contact with almost all package terminal pins.
However, as the tendency to increase the number of terminals and decrease the pitch grows with an increase in the integration density of IC devices, it is becoming difficult more and more for the conventional IC inspection scheme to satisfactorily cope with the "multiple-terminal/small-pitch" IC devices. Mechanical and dimensional limitations are imposed on the total number of pins and the minimum pin pitch of a probe card. Typically, the maximum number of pins and minimum pin pitch of such probe card, attained in the existing conditions, are about 300 and 80 micrometers, respectively. Obviously, if the maximum number of pins and minimum pin pitch of a target IC exceed the above limits, the conventional inspection method is no longer effective.
The same goes with the inspection of operations of LCDs which have been applied extensively with the recent tendency toward smaller electronic devices. As the number of external connection terminal pads arrayed on a panel substrate increases, the conventional "probe inspection" scheme cannot achieve a satisfactory inspection. As terminal pads are arranged at higher density, it becomes more difficult to perform the pin-positioning alignment to bring all the probe pins into contact with the terminal pads at a time, thus resulting in the inspection reliability being decreased.